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Two's Complement Converter - Online Binary Negative Encoder

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Range for 8-bit: −128 to 127
−128 to 127
Enter binary digits (0 and 1). Spaces are ignored. e.g. "1111 1111"
Detected: 8-bit
Quick Reference — 8-bit Two's Complement
Decimal Binary (Two's Comp.) Hex Notes
−1281000 00000x80Minimum value (special case)
−1271000 00010x81
−421101 01100xD6
−11111 11110xFFAll bits set
00000 00000x00Unique zero representation
+10000 00010x01
+420010 10100x2A
+1270111 11110x7FMaximum value
Frequently Asked Questions

Two's complement is the most widely used method for representing signed integers in binary form within modern computers. In this system, the most significant bit (MSB) serves as the sign bit: 0 indicates a positive number or zero, while 1 indicates a negative number. For an n-bit representation, the range is from −2n−1 to 2n−1 − 1. Two's complement simplifies hardware design because addition and subtraction use the same circuitry regardless of the sign of the operands.

To convert a negative decimal number to two's complement:
Step 1: Take the absolute value of the negative number.
Step 2: Convert that absolute value to binary, padding to your desired bit width.
Step 3: Invert all bits (this gives you the ones' complement).
Step 4: Add 1 to the result (this yields the two's complement).
Alternative shortcut: Starting from the right, copy all bits up to and including the first '1', then invert all remaining bits to the left. This tool shows every step visually!

Computers use two's complement for several key reasons: (1) Unique zero: There is only one representation for zero (all bits 0), unlike sign-magnitude which has both +0 and −0. (2) Simplified arithmetic: Addition and subtraction can be performed using the same hardware regardless of operand signs — no special sign-handling logic is needed. (3) Efficient hardware: The same adder circuit works for both signed and unsigned numbers, reducing chip complexity and cost. (4) Wrap-around behavior: Overflow handling is natural and consistent with modular arithmetic.

An 8-bit two's complement integer can represent values from −128 to +127 (inclusive). The minimum value −128 is represented as 10000000, and the maximum value +127 is represented as 01111111. Zero is 00000000. The total number of distinct values is 256 (28), with 128 negative values, zero, and 127 positive values. Notice there is one more negative value than positive — this asymmetry is inherent to two's complement and is due to the fact that −128 has no positive counterpart in 8 bits.

One's complement inverts all bits of the positive binary number to represent its negative counterpart. It has two zeros (+0 = 00000000 and −0 = 11111111), which complicates arithmetic. Two's complement is one's complement plus one. This extra step eliminates the duplicate zero, extends the negative range by one value (e.g., −128 in 8-bit), and simplifies carry/borrow logic in ALU circuits. Two's complement is the standard in virtually all modern processors including x86, ARM, and RISC-V.

Yes! In 8-bit two's complement, −128 is represented as 10000000. This is a special case because the absolute value |−128| = 128 cannot be represented as an unsigned 8-bit number (which maxes out at 255, but 128 in 8-bit binary is 10000000). Following the standard conversion: 128 in binary is 10000000, invert to get 01111111, add 1 to get 10000000 — which matches! The MSB being 1 correctly indicates a negative number, and the value works perfectly in arithmetic operations.

Method 1 (MSB check): If the MSB is 0, the number is positive — simply convert the binary to decimal as usual. If the MSB is 1, the number is negative — invert all bits, add 1, convert to decimal, and apply the negative sign.
Method 2 (Weighted sum): Treat the MSB as having a negative weight. For an n-bit number, the MSB contributes −2n−1 (instead of +2n−1), and all other bits contribute their usual positive weights. Sum all weighted bits to get the final decimal value. Example: 11010110 (8-bit) = −128 + 64 + 0 + 16 + 0 + 4 + 2 + 0 = −42.

Overflow occurs when the result of an arithmetic operation exceeds the representable range for the given bit width. In two's complement, overflow is detected by checking the carry into and out of the sign bit (MSB). If these two carries differ, an overflow has occurred. For example, adding 01111111 (127) + 00000001 (1) in 8-bit yields 10000000 (−128), which is incorrect — this is overflow. Most CPUs set an overflow flag (V flag in ARM, OF in x86) when this happens, allowing software to detect and handle the condition.

8-bit (Byte): Used in microcontrollers (e.g., Arduino, 8051), character encoding (int8_t in C), and small embedded systems. Range: −128 to 127.
16-bit (Word): Common in audio processing (16-bit PCM), older processors, and short integers in C. Range: −32,768 to 32,767.
32-bit (DWord): The standard int type on most 32-bit and 64-bit platforms. Range: approximately ±2.1 billion.
64-bit (QWord): Used for long integers, high-precision timestamps, and large file offsets. Range: approximately ±9.2 × 1018.

Yes, virtually all. Two's complement is the universal standard for signed integer representation in modern computing. It is used in x86, x86-64, ARM (32-bit and 64-bit), RISC-V, MIPS, PowerPC, and practically every other processor architecture designed since the 1970s. The C and C++ standards (as of C++20 and C23) now mandate two's complement for signed integer types, formally codifying what had been universal practice for decades. This guarantees portability and consistent behavior across all compliant compilers and platforms.